The events that cause interrupts vary depending on both the operating mode (NITRO mode vs TWL mode) and the processor (ARM9 vs ARM7). The following list shows the types of ARM9 interrupts in NITRO mode and in TWL mode. ARM7 interrupts are omitted from this discussion.
| Value | Type of Interrupt | Bit (2n) |
|---|---|---|
| OS_IE_V_BLANK | V-Blank interrupt | 0 |
| OS_IE_H_BLANK | H-Blank interrupt | 1 |
| OS_IE_V_COUNT | V-Counter interrupt | 2 |
| OS_IE_TIMER0 | Timer0 interrupt | 3 |
| OS_IE_TIMER1 | Timer1 interrupt | 4 |
| OS_IE_TIMER2 | Timer2 interrupt | 5 |
| OS_IE_TIMER3 | Timer3 interrupt | 6 *2 |
| OS_IE_DMA0 | DMA0 interrupt | 8 *2 |
| OS_IE_DMA1 | DMA1 interrupt | 9 |
| OS_IE_DMA2 | DMA2 interrupt | 10 |
| OS_IE_DMA3 | DMA3 interrupt | 11 |
| OS_IE_KEY (*1) | Key Interrupt | 12 |
| OS_IE_CARTRIDGE | Game Pak IREQ/DREQ interrupt | 13 |
| OS_IE_SUBP | ARM7 interrupt | 16 |
| OS_IE_SPFIFO_SEND | ARM9-ARM7 send FIFO empty interrupt | 17 |
| OS_IE_SPFIFO_RECV | ARM9-ARM7 receive FIFO not-empty interrupt | 18 |
| OS_IE_CARD_DATA | Card data transfer end interrupt | 19 |
| OS_IE_CARD_IREQ | Card IREQ interrupt | 20 |
| OS_IE_GXFIFO | Geometry command FIFO interrupt | 21 |
*1 The hardware specification does not allow the use of key interrupts. However, they can be used for awakening from sleep.
*2 There is no interrupt that corresponds to the case where the bit is 27.
Within the table, items marked with a ★ are new and were not used in NITRO.
| Value | Types of Interrupts | Bit (2n) |
|---|---|---|
| OS_IE_V_BLANK | V-Blank interrupt: | 0 |
| OS_IE_H_BLANK | H-Blank interrupt: | 1 |
| OS_IE_V_COUNT | V-Counter interrupt | 2 |
| OS_IE_TIMER0 | Timer0 interrupt | 3 |
| OS_IE_TIMER1 | Timer1 interrupt | 4 |
| OS_IE_TIMER2 | Timer2 interrupt | 5 |
| OS_IE_TIMER3 | Timer3 interrupt | 6 *5 |
| OS_IE_DMA0 | DMA0 interrupt | 8 *5 |
| OS_IE_DMA1 | DMA1 interrupt | 9 |
| OS_IE_DMA2 | DMA2 interrupt | 10 |
| OS_IE_DMA3 | DMA3 interrupt | 11 |
| OS_IE_KEY (*3) | Key Interrupt | 12 |
| OS_IE_CARTRIDGE | Game Card IREQ/DREQ interrupt | 13 |
| OS_IE_CARD_A_DET ★ (*4) | Memory Card A MC_DET terminal falling edge interrupt | 14 |
| OS_IE_CARD_B_DET ★ (*4) | Memory Card B MC_DET terminal falling edge interrupt | 15 |
| OS_IE_SUBP | ARM7 interrupt | 16 |
| OS_IE_SPFIFO_SEND | ARM9-ARM7 send FIFO empty interrupt | 17 |
| OS_IE_SPFIFO_RECV | ARM9-ARM7 receive FIFO not-empty interrupt | 18 |
| OS_IE_CARD_A_DATA (OS_IE_CARD_DATA) (*4) | Card [A] data transfer completion interrupt | 19 |
| OS_IE_CARD_A_IREQ (OS_IE_CARD_IREQ) (*4) | Card [A] IREQ interrupt | 20 |
| OS_IE_GXFIFO | Geometry command FIFO interrupt | 21 |
| OS_IE_DEBUG_RECV ★ | DEBUG communication channel receive buffer readable interrupt | 22 |
| OS_IE_DEBUG_SEND ★ | DEBUG communication channel send buffer writable interrupt | 23 |
| OS_IE_DSP ★ | DSP interrupt | 24 |
| OS_IE_CAMERA ★ | Camera interrupt | 25 |
| OS_IE_CARD_B_DATA ★ (*4) | Card [B] data transfer completion interrupt | 26 |
| OS_IE_CARD_B_IREQ ★ (*4) | Card [B] IREQ interrupt | 27 |
| OS_IE_NDMA0 ★ | New DMA0 interrupt | 28 |
| OS_IE_NDMA1 ★ | New DMA1 interrupt | 29 |
| OS_IE_NDMA2 ★ | New DMA2 interrupt | 30 |
| OS_IE_NDMA3 ★ | New DMA3 interrupt | 31 |
*3 The hardware specification does not allow the use of key interrupts. However, they can be used for awakening from sleep.
*4 The "A" and "B" designations for Cards were set during development for expediency. Type B are used for development hardware like the debugger and are not normally used by users.
*5 There is no interrupt that corresponds to the case where the bit is 27.
OS_EnableIrqMask
OS_DisableIrqMask
OS_SetIrqMask
2008/05/30 Initial version.
CONFIDENTIAL