MI_DmaPipe*

Syntax

#include <nitro/mi.h>

void MI_DmaPipe32( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size );

void MI_DmaPipe32_SetUp( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size );

void MI_DmaPipe16( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size );

void MI_DmaPipe16_SetUp( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size );

void MI_DmaPipe32Async( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size,
MIDmaCallback callback,
void* arg );

void MI_DmaPipe32Async_SetUp( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size,
MIDmaCallback callback,
void* arg );

void MI_DmaPipe16Async( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size,
MIDmaCallback callback,
void* arg );

void MI_DmaPipe16Async_SetUp( u32 dmaNo,
volatile const void* src,
volatile void* dest,
u32 size,
MIDmaCallback callback,
void* arg );

Arguments

Return Values

None.

Description

Uses the DMA to continually send data from the same transfer source address to the same transfer destination address.

The *_SetUp functions only configure the given settings without actually performing DMA. To actually start DMA, call the MI_DmaRestart function.

MI_DmaPipe16() and MI_DmaPipe16Async() transfer in 16-bit units. Both the transfer source address and the transfer destination address must be 2-byte aligned. MI_DmaPipe32() and MI_DmaPipe32Async() transfer in 32-bit units. Both the transfer source address and the transfer destination address must be 4-byte aligned.

MI_DmaPipe16() and MI_DmaPipe32() wait within the function until DMA completes. MI_DmaPipe16Async() and MI_DmaPipe32Async() call the callback function when DMA ends. The callback, callback, is a MIDmaCallback type (a void type function that takes one void* argument). callback is called from the system DMA interrupt handler and therefore is called even if interrupts are prohibited.

It is necessary to understand how to use Async-type APIs in order to obtain maximum functionality. Refer to the MI_DmaCopy function for more information about this.

DMA Controller Bugs

See the section titled "DMA Controller Bugs" in the reference for the MI_DmaCopy function.

Internal Operation

Uses the following IO registers: DMAn source register (0x40000B0 + 12n), DMAn destination register (0x40000B4 + 12n), and DMAn control register (0x40000B8 + 12n). (n specifies the DMA channel.))

See Also

MI_DmaCopy*
MI_DmaFill*
MI_DmaClear*
MI_DmaSend*
MI_DmaRecv
MI_CpuPipe*
MI_DmaRestart

Revision History

2009/11/20 Added a description of a problem with the DMA controller.
2007/10/31 Added _SetUp().
2007/10/24 Initial version.

CONFIDENTIAL